Field Programmable Neural Arrays
Mr Bernard Girau, Laboratoire Lorrain de Recherche en Informatique et ses Applications, France

Abstract: Programmable hardware appears as an interesting target for simple and rather efficient neural network implementations. However, several problems have to be dealt with. Most of them are linked to a limited number of programmable cells and to a simple 2D topology. Several methods have been proposed to obtain area-saving neural operators. Field programmable neural arrays have been defined to develop neural architectures that are easy to map on to FPGAs, and more generally on to digital hardware. They allow us to simplify the connection graph of standard neural models. FPNA basic principles derive from FPGAs' ones: complex functions realized with an adequately configured set of simple resources (transfer functions and autonomous connections). I will describe some of the main aspects of FPNAs: basic principles, definition, computation schemes, general properties, FPGA implementations, benchmark applications.

This seminar was held on 9 March 1999 at the Department of Computer Science,Royal Holloway, University of London

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